The present invention relates to a unitary-gain final stage particularly for monolithically integratable power amplifiers which use class AB-driven N-channel MOS transistors as power devices.
The technical problem of power amplifiers which use class AB-driven N-channel MOS transistors essentially relates to the effective control of the bias current in the final devices and to the reduction of crossover distortion.
The need to control the bias current arises from the compromise between the need to limit power dissipation, which requires a low bias current Iq, and the need to minimize crossover distortion due to the non-linearity of the final devices, which can be observed in the low-bias regions.
Another cause of crossover distortion resides, as is well-known, in the phenomenon of the complete switching off of alternatively one or the other of the final devices during a complete cycle of the output signal and in the switching-on delays which consequently arise therefrom, especially for very high frequencies.
The literature reports some examples of bias current control; the article by B. Roehr, "A simple direct-coupled power mosfet audio amplifier topology featuring bias stabilization", published in IEEE Transactions on Consumer Electronics, Vol. CE-28, No. 4, November 1982, pages 546-552, hereinafter referenced as [1], and the article "Une autre conception de l,amplificateur de puissance", published in the Siliconix catalog, AN80-5, pages 75-79, hereinafter referenced as [2], are particularly significant.
Article [1] describes a power amplifier in which the bias current in the final power devices is controlled by means of a complicated system for detecting the bias current I.sub.q which is based on a limiting circuit and on a subsequent filtration, with the use, among other things, of an operational amplifier and of a high-value capacitor. The capacitor used has a value two orders of magnitude higher than the other capacitors used in the circuit illustrated in [1] on page 550.
The amplifier circuit described in [2] is essentially the same as the preceding one, but the circuit for detecting the bias current I.sub.q is not present. Control of the bias current I.sub.q is entrusted, in this last circuit, to a potentiometer which is illustrated in the diagram on page 78 of [2].
The two proposed solutions, and in particular both the high-capacitance capacitor and the potentiometer, are not suitable for being manufactured in integrated form.
Furthermore, as illustrated on page 79 of [2], the circuit for driving the gate terminals of the final power transistors poses the problem of having PNP transistors with high current capacity. These transistors, in the particular perspective of monolithic integration, consume useful area, and it is convenient to limit their number.